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Mentor Graphics (I) Pvt Ltd Hiring Engineers

Saturday, January 2, 2010

Requires a BSEE/BSCE or MSEE/MSCE, and demonstrated experience in the following areas: High Level Verification (VHDL, Verilog, System Verilog, SystemC, constrained random, assertions). C++ and OOP experience required. Strong group or customer presentation skills are required, excellent interpersonal & communication skills are a must. Moderate travel and ability to relocate is required.



Experience : 0 - 1 Years
Industry Type : IT-Software/ Software Services
Role : Team Lead/Tech Lead
Functional Area : Embedded/EDA /VLSI/ASIC/Chip Design
Education : B.Tech/B.E/ M.Tech - Computers, Electrical
Location : Noida



Keywords : VHDL, Verilog, System Verilog, SystemC, constrained random, assertions
Website : http://www.mentor.com
http://jobsearch.naukri.com/mynaukri/mn ... 1209000130

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