Design Engineer,Project Engineer and JRF Jobs in IIT Bombay

INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
Powai, Mumbai 400 076.
Advertisement No. E-41/P(10)09-10

Positions of Design Engineer (DE), Project Engineer (PE), Junior Research Fellow (JRF) are available in the following projects.

Chemistry
P(10-1) Development of Anti-Malarial Therapeutic based on Chemically Modified siRNA
JRF: (1 Post) Eligibility : M.Sc. with First Class in Biotechnology/Biochemistry/Microbiology/Life Sciences or equivalent with valid GATE score or CSIR/ICMR JRF. At least 6 month experience in cell biology research with hands on training in biochemistry and molecular biology techniques are essential.
Salary : Consolidated salary Rs.12000/- p.m. + HRA
Job Profile : Solid-phase synthesis and purification of RNAs, and gene down-regulation studies in human and in Plasmodium Falcifarum cell lines employing standard biochemistry and cell biology techniques.

Computer Science & Engineering
P(10-2) Multi-Service Transport Platform (MSTP) Development
DE: (3 Post) Eligibility : B.E/B.Tech Degree. We are currently seeking PCB designers to design High speed FPGA based boards for advanced telecommunication applications. PCB design tools: The work will be primarily carried out in OrCAD / Allegro
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Design and Testing of FPGA based boards.PCB layout design for multilayer PCBs (8+ layers) Study and understanding project specifications. Validating signal integrity, EMI, EMC etc.

P(10-3) Multi-Service Transport Platform (MSTP) Development
DE: (2 Post) Eligibility : B.E/B.Tech Degree.We are currently seeking FPGA Design engineers for building technologies in advanced telecommunication applications.
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Development of FPGA specifications. Development of detailed architectures in VHDL/VERILOG. High-speed serial (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).

P(10-4) PERISCOPE: Pragmatic Efficient Reliable Internetworking Solution Using Consumer-Centric Omnipresent Ethernet
DE: (3 Post) Eligibility : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: - Embedded Hardware Software design, - High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Development of FPGA specifications. Development of detailed architectures. Implementing algorithms in FPGA design using VHDL/VERILOG. Instantiating synthesizable VHDL/VERILOG code applicable to large FPGA design.Generating test bench code and providing code coverage applicable to a large instantiated FPGA design. Using tools such as Xilinx ISE, Synplicity (Synopsys), and ModelSim. Trouble shooting and diagnostic/debug.

DE: (2 Post)
Eligibility : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: - EmbeddedHardware Software design, - High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Development of FPGA specifications. Development of detailed architectures. Implementing algorithms in FPGA design using VHDL/VERILOG. Instantiating synthesizable VHDL/VERILOG code applicable to large FPGA design.Generating test bench code and providing code coverage applicable to a large instantiated FPGA design. Using tools such as Xilinx ISE, Synplicity (Synopsys), and ModelSim. Trouble shooting and diagnostic/debug.

Electrical Engineering
P(10-5) Development of Bidirectional Power Converter for Fuel Cell Systems
PE: (1 Post) Eligibility : B.Tech. in Electrical Engg. with one year work experience (or M.Tech.), preferably with knowledge of the design of power electronic systems (e.g. SMPS, drives, converters etc.)along with basic circuit analysis, MATLAB/SPICE simulation, PCB design and programming in C and/or Assembly for DSP/Micro-controllers.
Salary : Consolidated salary Rs.10000/- p.m.
Job Profile : The work involves design and development of fuel cell based power electronic system and the associated control.

P(10-6) Development of Switched Capacitor DC-DC Converters
JRF: (1 Post) Eligibility : B.Tech. in Electrical Engineering with one year experience (or M.Tech.), preferably with knowledge of the design of electronic/power electronic systems and their control (e.g. SMPS, drives etc.), PCB design, basic circuit analysis, computer simulations of circuits and systems, programming in C or assembly for microcontrollers/DSP.
Salary : Consolidated salary Rs.12000/- p.m.
Job Profile : Analysis, simulation and design of switched capacitor dc-dc power converters and their control.

Mathematics
P(10-7) Numerical Treatment of Integral Operators with Non-smooth Kernels
JRF: (1 Post) Eligibility : M. Sc. in Mathematics
Salary : Consolidated salary Rs.12,000/- p.m.
Job Profile : The project consists of theoretical analysis of approximate solution of singular integral operators using the framework of Functional and Numerical Analysis. The validation of theoretical results by implementation using a computer is an integral part of the project.

How to apply :
Please send the application to the Asst. Registrar (R & D Office), IRCC Wing, SJMSOM Building, Indian Institute of Technology Bombay, Powai, Mumbai-400076, Phone: 022-2576 4078 Fax. : 022-25764034 Email id.: recruit@ircc.iitb.ac.in

For More Detail Please visit:
http://www.ircc.iitb.ac.in/IRCC-Webpage/RecruitmentGenerateAdvertisement.jsp?advcirno=E-41/P(10)09-10